IMPLEMENTATION OF CLOCK GATED FinFET BASED ALU
Abstract
Abstract - High-performance, energy-efficient computing solutions are needed due to semiconductor technology's smaller devices. The CPU's Arithmetic Logic Unit (ALU) has been extensively researched and developed to improve efficiency and power consumption. Clock Gated FinFET-based ALU design and analysis are presented in this paper. It saves power with clock gating and FinFET technology's short-channel effect control and lower leakage currents. LTSpice, a popular analog, digital, and mixed-signal circuit simulation program, uses our design process to address nanoscale circuit speed, power dissipation, and scaling We demonstrate significant power efficiency, operational speed, and leakage current reduction in our Clock Gated FinFET-based ALU compared to conventional MOSFET designs. Our results demonstrate how clock gating and FinFET technology can be used in ALUs for next-generation computing devices. The paper also discusses how our design affects CPU architecture and its flexibility and scalability for different computing scenarios. The study concludes with suggestions for cutting-edge material and circuit research to improve ALU functionality and energy efficiency. Keywords: Clock Gating, FinFET, Arithmetic Logic Unit (ALU), LTSpice Simulation, Power Efficiency, Leakage Current Reduction, Nanoscale Circuits, Semiconductor Technology.
How to Cite
E. Chandra Kala, Mr. M. Vamsi Krishna, N. Bhanuprakash Reddy, Y.Govardhan. (1). IMPLEMENTATION OF CLOCK GATED FinFET BASED ALU. International Journal Of Innovation In Engineering Research & Management UGC APPROVED NO. 48708, EFI 5.89, WORLD SCINTIFIC IF 6.33, 11(8), 87-95. Retrieved from http://journal.ijierm.co.in/index.php/ijierm/article/view/2309
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Articles